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저작시기 2014.08 |등록일 2017.04.26 한글파일한컴오피스 (hwp) | 7페이지 | 가격 2,000원

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* MyAnalog V6.3 SPICE netlist generator
* Cell Name :: OR3_Gate
* Flatten Extraction for Berkely SPICE 3
* Generated Date :: 2013/6/5 16:0.38
**********************************************************
*.GLOBAL OUT0 IN1 IN0
*.GLOBAL GND VDD
**********************************************************
MT_I5 I4_NNS IN0 GND GND NMOS L=0.4U W=1.0U AD=1.32P AS=1.32P PD=3.4U PS=3.4U
VT_I7 IN0 GND PULSE ( 0 5 35NS 2NS 2NS 48NS 100NS )
VT_I6 IN1 GND PULSE ( 0 5 10NS 2NS 2NS 48NS 100NS )
MT_I4 I4_NND IN1 I4_NNS GND NMOS L=0.4U W=1.0U AD=1.32P AS=1.32P PD=3.4U PS=3.4U
MT_I2 VDD IN1 I4_NND VDD PMOS L=0.4U W=2.0U AD=2.64P AS=2.64P PD=4.6U PS=4.6U
MT_I0 VDD IN0 I4_NND VDD PMOS L=0.4U W=2.0U AD=2.64P AS=2.64P PD=4.6U PS=4.6U
MT_I8_I2 VDD I4_NND OUT0 VDD PMOS L=0.4U W=2.7U AD=2.64P AS=2.64P PD=4.6U PS=4.6U
CT_I8_I3 OUT0 GND 0.1P
MT_I8_I6 OUT0 I4_NND GND GND NMOS L=0.4U W=1.0U AD=1.32P AS=1.32P PD=3.4U PS=3.4U
**********************************************************

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