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CMOS 기술

저작시기 2006.01 |등록일 2007.03.02 파워포인트파일MS 파워포인트 (ppt) | 66페이지 | 가격 2,000원

소개글

CMOS의 기본 구조부터 동작원리, CMOS 제작과정 (process) 에 까지 정리한 장표입니다.
또한 latch-up 등과 같은 side effect와 이것을 방지하기 위한 방안등도 함께 수록되어
있습니다.

목차

MOS Inverters
The n-Channel (NMOS) Technology
The CMOS Technology
Threshold Control and Matching
CMOS Manufacturing Steps
CMOS Latch-up
Latch-up Prevention
Trench Isolation
Schottky-MOS Transistor

본문내용

<Advantages of p-well over n-well CMOS>
- p well technology may be the better choice for pure static logic, in which a good balance between the performance of both MOS device types is beneficial.
- p well CMOS is less susceptible to field inversion problems than n well CMOS
- It is easier to form a p-retrograde well than an n- retrograde well, since boron ions penetrate deeper than arsenic or phosphorus ions at the same implant energy.

<Twin well technology>
Two device types perform similarly as channel lengths approach 0.5μm, it is useful to provide symmetrical n- and p-channel devices.
Body doping of both transistor types maintain adequate threshold voltage levels.
It is compatible with the technologies of either isolation by selective epitaxial growth or trench isolation. Self aligned channel stops can be easily implemented in the twin well approach, allowing the spacing between n- and p-channel devices to be reduced.

참고 자료

VLSI 설계, 이론과 실습 (공진흥, 김남영, 김동욱, 이재철)
The art of analog layout (Alan Hastings)
Basic VLSI design systems and circuits (D. A. Pucknell)
Design of analog CMOS integrated circuits
Introduction to nMOS & CMOS VLSI systems design (A. Mukherjee)
VLSI technology (S. M. SZE)
Silicon processing Volume 2 – process integration (S. Wolf)
Silicon processing Volume 4 – deep submicron process technology (S. Wolf)
반도체 공동 연구소 공정교육 자료집
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